Cyient Incubation Center
BVRIT-CYIENT incubation center Inaugurated by Mr. K.V. Vishnu Raju garu, Honorable chair person for SVES educational society and Mr. Ramanand Puttige, head business fulfillment, CYIENT Ltd, Hyderabad at Department of ECE, BVRIT Narsapur on 5th February 2016, In the presence of Mr. Ravichandran Rajagopal, Vice chairman, SVES and Mr. Aditya, Joint secretary, SVES, Dr. Venkateshwarlu, Principal, BVRIT, Dr. I.A. Pasha, HOD, Dept of ECE, Mr. Sateesh Chandra, Director placements, SVES, CYIENT industry Engineers , HODs and Deans of BVRIT, faculty and students. In this function MOU and project charter is exchanged between SVES and CYIENT. Mr. Mandeep and Dr. I.A.Pasha are the single point of contacts from CYIENT and BVRIT respectively.
In this program Mr. K.V.Vishnu Raju Garu spoke about the importance of the industry relationships and the way how this incubation center will fill the gap between industry and academy and he explained about how the BVRIT is working with technology and social welfare. Mr. Ramanand puttige address the gathering said that how the CYIENT is involved in new innovations in automobile and IC technologies.
Objective of this center is to create academic center of excellence in semiconductor technology. The key activities of the above center is to provide domain training by VLSI experts from CYIENT to students supported by two faculty members Mr. I.B.K Raju and U. Gnaneshwara chary from Dept of Electronics and communication, BVRIT who also got trained by CYIENT. Training is followed by Identify the real time problems and finding the technological solutions and validating the idea (proof of concept). Once the idea is formulated and validated design and implementation will be proceeded.
Twenty one students from UG and PG from department of ECE have been selected by conducting the screening test. The training session is designed to meet contemporary VLSI industrial demands. Students are exposed into various domains of chip design through interactive class room teaching and Hands on lab sessions using state of art industrial EDA tools from SYNOPSYS university program, in the first 3 months followed by proof of concept/ industrial driven projects in next two semesters. Students will be practically proficient and job ready in various aspects of VLSI logic design, verification methodologies, physical design and custom layout design. The outcome of this center is to create opportunity to the students to work in core technology and High skilled students are available for semiconductor industries.