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EAMCET | ICET | ECET | CODE: BVRI

PGECET | CODE: BVRI1

Dr. T.Vasudeva Reddy

Dr. T.Vasudeva Reddy

Associate Professor, ECE Dept.
vasu.tatiparthi@bvrit.ac.in

Diploma: – Electronics & communication : Board of Tamilanadu Technical Education in 1999
B.E: – Electronics & communication : Madras university in 2002
M.Tech: – Vlsi System design from J.N.T university, Hyderabad IN 2008
Ph.D.: – Lowpower VLSI DESIGN from Rayalaseema University Recognized by Govt. of Andhra Pradesh

Teaching Experience – 14 years

JNTU Registration No – 85150402–141643
BVRIT ID – 282
Ratification Status – Ratified

  1. IETE
  2. ISTE
  1. Recognized as Hon. Editorial Board Member-Consulting Editor Recognized by Innovative Scientific Research Professional Malaysia, Publisher
  2. Selected forThe Innovative Global Scientific Research Educationalist Professionals(Educational) Award
  3. Peer Review Comitee Member for different Journals
  4. More than100 UG & PG Students have done internships at more than 50 companies
  5. Attended TI work shop in TEXAS INSTRUMENTS 2012.
  6. Arranged more than 20 industrial visits to the students to improve their knowlede
  7. Participated In TI ADC Contest From 2012,2013 & 2014
  8. Trained by mission10x on faculty development progrmme conducted by WIPRO at BVRITin 2010
  9. Class topper in Diploma in E.C.E
  10. Worked as Guest Faculty Member At CITD (Central Institute of Tool Design),at Bala Nagar in 2007
  11. Best Teacher Award for the year 2006-07 & 2007-08.
  12. Initiator for Electrosurge2k6 National Level Technical symposium.
  13. Successfully organized Electrosurge2k6 Annual National Technical fest at MRCET
  14. Conducting Technical quiz, encouraging students towards papers & posters presentation to upgrade their knowledge
  1. M.Tech. guidance: Guided 26 students
  2. B.Tech. project guidance: Guided more than 60 students
  3. No. of Conference Preceedings: 12
  4. No. of Journal Publications: 27
  5. No. of guest lectures delivered: 05
  1. Low Power VLSI
  2. Micro & Nano electronics
  1. IoT & Embedded automation
  2. Wireless & Mobile communication
  3. AI & ML algorithms

NPTEL Certifications:

  1. Python for Data Science
  2. VLSI Physical Design
  3. Innovation by Design
  4. Design, Technology and Innovation
  5. CMOS VLSI design
  6. Introduction to Industry 4.0 industrial Internet of things
  7. Basic Software define Radio and practical Applications

 

Coursera Certifications:

  1. Introduction to the Internet of Things and Embedded Systems by University of California, Irvine
  2. Innovation Through Design: Think Make, Break, and Repeat University of Sydney.
  3. Python for Data Science and AI by IBM
  4. Machine Learning for All by University of London
  5. Data Science by IBM

 

E & ICT Academy Certifications:

  1. Certified in the course of “VLSI Physical design.
  2. Completed a course on Electronic design & Automation
  3. Certified in “introduction to control Engineering
  4. Certified in “introduction to Electronics

 

UDEMY Certifications:

  1. Complete guide to install open source EDA tools
  2. Cerified in VLSI Technology
  1. Three -day Hand on workshop on “Embedded Controller & Processor Using TI Tools”17th to 19th December 2019, Texas instrumentation Laboratory, in Dept. .of electronics and communication Engg.
  2. Three day Faculty Development Programon Research Migrations in VLSI Technology”(Digital Signal and Image Processing using Xilinx FPGA’s & Research trends in MEMS)on 11th- 13th February 2020
  1. Presented A guest lecture on” Low Power VLSI Memory Designs ” 20th &21st Nov 2017 in Lampex electronics,kukatpally,Hyderabad.
  2. Delivered a guest lecture on ”Embedded System Design & Architecture” 19th &20th Oct 2017 at Surya electronics,Hyderabad.
  3. Invited talk on “Embedded System Design & IOT Aspects in SVS Embedded systems” 06th & 07th Sep 2016
  4. Presented a guest lecture on “Electronic Measurement & Instrumentation” in Swarna Bharathi Institute of Technology, Khammam in 13th oct 2015

INTERNATIONAL/NATIONAL JOURNALS (SCOPUS)

  1. . Vasudeva Reddy et al “Design of FinFET based 128 bit SRAM in 7nm & various Effects near threshold operation for ultra-low power application” International Journal of Recent Technology and Engineering (IJRTE) ISSN: 2277-3878,Volume-8, Issue-5, January 2020,3361-3366,Retrieval Number: E5870018520/2020©BEIESP, DOI:10.35940/ijrte.E5870.018520,https://www.ijrte.org/wp-content/uploads/papers/v8i5/E5870018520.pdf( SCOPUS)
  2. 2. T. Vasudeva Reddy et al., published paper “MEMS Design Techniques and Performance estimation in Connected Cars“ International Journal of Innovative Technology and Exploring Engineering (IJITEE) ISSN: 2278-3075, Volume-9 Issue-2, December 2019.Retrieval Number: B6683129219/2019©BEIESP, DOI: 10.35940/ijitee.B6683.129219,https://www.ijitee.org/wp-content/uploads/papers/v9i2/B6683129219.pdf( SCOPUS)
  3. Dr. T.Vasudeva Reddy &k.MadhavaRao has presented a paper on “Novel strategies ofLow power Subthreshold SRAM designs under 32nm for real-time applications.” in InternationalConference on Computational and Intelligent Techniques for Automation of Engineering Systems (CITAES), Scopus Nov 30Th&1st December
  4. T. VasudevaReddy et al al published paper on “Multi Level Robust Data Security System” in international journal of pure and applied mathematics (scopus) inRAPIDEET-2018 20 & 21st April 2018.
  5. T. VasudevaReddy et al al published paper on “3gpp Based LTE Network Architecture for Broad band Wireless Communication”ininternational journal of pure and applied mathematics (scopus) inRAPIDEET-2018 20&21st April 2018.
  6. T. Vasudeva Reddy & DrB.K.Madhavi has published paper In Springer Journal “ Designof High performance,Low power Sub threshold using Source Coupled Logic for implantable applications “inInternational Conference on Cognitive Informatics Soft Computing (CISC-2017) which will be held at VBIT, Hyderabad from 20th to 21st December 2017.

 

UGC RECOGNIZED JOURNALS

  1. T. Vasudeva Reddy et al published paper on”Smart Cradle” in International Journal on Advanced Electrical and Computer Engineering(IJAECE) in 2349-9338, ISSN(Print): with ISSN 2349-932X in Volume 5, Issue 1 , April 2018.
  2. T. VasudevaReddy et al published paper on”Speaking Glove for Dumb Patients in in “International Journal for Research in Applied Science & Engineering Technology (IJRASET), WITH ISSN 2321-9653 in Volume 6, Issue IV, April 2018.
  3. T. Vasudeva Reddy et al published paper on”Smart Book” in International Journal of Creative Research Thoughts (IJCRT) With ISSN 2320-2882 in Volume 6, Issue 2 April 2018
  4. T. Vasudeva Reddy et al published paper on “IoT Based industrial parameters measurement & monitoring”in International Journal for Research in Engineering Application & Management, (IJREAM) With ISSN 2454-9150 in Volume 4 | Issue 1 | April 2018
  5. T. Vasudeva Reddy et al published paper on”LIP10X Bluetooth Printer”in International Journal of Creative Research Thoughts(IJCRT) WITH ISSN NO :2320-2882 in Volume 6 | Issue 2 | April 2018
  6. T. Vasudeva Reddy et al published paper on”School billing Machine” in International Journal of Engineering, Science and Mathematics (IJESM) with ISSN: 2320-0294 in Vol. 7 Issue 4,APRIL 2018
  7. T. Vasudeva Reddy et al published paper on”Autonomous Lubrication System”international journal for science and advance research in technology(IJSART) with ISSN 2395-1052 IN Volume 4,Issue 1 in January 2018.
  8. T. Vasudeva Reddy et al published paper on “Home Cybernation for Paraplegic Using Wi-Fi” International Journal of Scientific & Engineering Research, Volume 7, Issue 4, April-2016, ISSN 2229-5518, IJSER © 2016.http://www.ijser.org.
  9. T. VasudevaReddy et al published paper on “Design & comparison of novel low power, sub threshold Schmitt trigger based SRAM & source coupled logic for cognitive applications. In Open Access International Journal Of Science & Engineering, Volume 2, Issue , November 2017||ISSN (Online) 2456-3293.
  10. T. VasudevaReddy et al published paper on “Design & Analysis of Single Bit Sub-Threshold SRAM using Traditional SRAM Design under 32nm Design” Volume 5, Issue XI, November 2017,in International Journal for Research in Applied Science & Engineering Technology.
  11. T. Vasudeva Reddy et al published paper on “Design, Simulation & Comparison Of Novel Tg8t SRAM With Traditional SRAM Design In Open Access International Journal Of Science & Engineering, Volume 2,Issuexii,December 2018||ISSN (Online) 2456-3293.(UGC approved)
  12. T. VasudevaReddy et al published paper on “ Digi Slate” Volume 6, Issue I, January 2018,in International Journal for Research in Applied Science & Engineering Technology.(UGC approved)
  13. T. VasudevaReddy , Sunil Kumar, Sudharshan Reddy, VikasPetnakota published paper on “HOME CYBERNATION FOR PARAPLEGIC USING WI-FI” in International Journal of Scientific & Engineering Research, Volume 7, Issue 4, April-2016 ISSN 2229-5518 .
  14. T. Vasu Deva Reddy etal , published paper on” design and analysis of MARCH C algorithm for counter based MBIST controller “in International Journal For Technological Research In Engineering Volume 3, Issue 3, November-2015 with ISSN (Online): 2347 – 4718 and Impact Factor : 1.4.
  15. T. Vasu Deva Reddy etal published paper on” DESIGN & MODELING OF POWER EFFICIENT DATA ENCODING TECHNIQUES IN NOC” International Journal For Technological Research In Engineering Volume 3, Issue 3, November-2015 with ISSN (Online): 2347 – 4718 Impact Factor : 1.4.
  16. T. Vasudeva Reddy etal; published paper on “Design and Verification of Dual Mode Logic (DML) for Power Efficient and High Performance”in International Journal of Advance Engineering and Research Development Volume 1,Issue 12, December -2014 with impact factor of 3.3 and e-ISSN(O): 2348-4470 p-ISSN(P): 2348-6406
  17. T.Vasudeva Reddy, etal; published paper on sub threshold SRAM bitcell topologies for ultra lowpower applications in International Journal of Scientific & Engineering Research ,Volume 5,Issue8,August-2014 ISSN2229-5518 impact factor of 3.2.
  18. T.VasudevaReddy,etal; published paper on”Design and Modeling Of SchmittTrigger-based SubThreshold 8T SRAM for Low Power Applications ”inInternational Journal of Computer Applications .Volume104–No12, October 2014 ISSN for IJCA Digital Library is 0975-8887.With the impactfactorof 2.52.
  19. T. Vasu deva Reddy etal published paperon FPGA Implementation of Low Power Serial to High Speed Data Networks in “International Journalon Recent andInnovation Trends in Computing and Communication .Volume : 2 Issue : 8 August 2014 ISSN:2321-8169 impact factor of 5.098
  20. T. Vasu deva Reddy &etal published paper on Modeling of Low Power serial inter face to High speed Ethernet on FPGA in International Journal of Advance Research in Science and Engineering Volume 03,Issue11 and November 2014 ISSN:2319-8354 impact factor of 1.42.
  21. T.Vasu deva Reddy etal; published paper on Design of Low Voltage Low Power Op-Amp using DTMOS Technique for Low Power Applications in International Journal of Computer Applications November 2014 Edition.ISSN for IJCA Digital Library is 0975-8887. impact factor of 2.52
  22. T.Vasu deva Reddy etal; A paper Published” A Zigbee Wireless Sensor Network and Multi-Way Bus ,Communication Medium Using CAN Bus For Real time industrial Applications ”in the international journal of engineering and innovative technology (IJEIT, florida ,US, ISSN2277-3754)
  23. T.Vasudeva Reddy etal Published in the journal “Implementation of QUADPCM Codec for Noise Elimination using higher order filters ”in In the .Journal of Electrical ,Electronics & Computing Technology,Vol.2(4),Sep-Dec.,2011@ISSN2229-3027
  1. DrT. Vasudeva Reddy , K. Madhava Rao has presented a paper on “Performance & functionality of novel Subthreshold SRAM’s using low power techniques for SoC designs”in 3rd International Conference on Communication and Electronics Systems (ICCES 2018), 15th & 16th,,October 2018,Coimbatore,india
  2. Dr T. Vasudeva Reddy , K. Madhava Rao has presented a paper on “Design & comparative analysis of low power subthreshold source coupled logic (SCL) based SRAM with traditional SRAM under 32nm”in nternational Conference on Innovations in Engineering, Technology and Sciences” (ICIETS),20th & 21st September 2018,Mysore,India
  3. T. Vasudeva Reddy et al published paper In IEEE, Analysis & Design of Robust Ultra-Low Power Subthreshold SRAM models IN 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT 2017)
  4. T,Vasudeva Reddy et al published paper In IEEE, “Design strategy & analysis of Sub threshold SRAM in power & delay for wearable applications EEE Xplore Compliant – Part Number:CFP17AWO-ART, ISBN:978-1-5090-5013-0 PAGE NO:972-976.
  5. T. Vasudeva Reddy &DrB.K.Madhavi has presented a paper on ”Design and estimation of Robust Ultra-Low Power Subthreshold SRAM models with single bitcelltoplology” in “IEEE International conference on Signal Processing, Communication, Power and Embedded System (SCOPES)- ISBN:CFP16H12-PRT/978-1-5090-19-5 ©2017 IEEE With Page No:86-90
  6. T. Vasudeva Reddy &DrB.K.Madhavi has presented a paper on”designing of schmitt trigger-based architecture 8t sram of 256 bit cells under nm technology for lowpower applications” in IEEE International Conference on Engineering and Technology (ICET) 2016 With 1SSN NO:978-1-5090-12-9©2017 IEEE VOLUME NO:1 PAGE NO: 72-76
  7. T. Vasudeva Reddy &DrB.K.Madhavi has presented a paper on“Analysis & design of robust ultra-low power subthresholdsram models in in IEEE “An International Conference on Control, Instrumentation, Communication and Computational Technologies-2016, (ICCICCT-2016) With ISBN 978-1-73-88-9/17/$.00 ©2017 IEEE
  8. T.Vasudeva Reddy &DrS.SrinivasaRao presented a paper on Low power area efficient Dynamic Quad PCM codec with filter for Communication applications in IEEE International Conference on Electrical, Electronics, Signals, Communication and Optimization(EESCO) in Vizag Bay Subsection 24 Jan – 25 Jan 2015, with 978-1-4799-7678-2/15© 2015 IEEE volume 1,issue 4 page no:1746 to 1752
  1. . Vasudeva Reddy has presented a paper on” Design & Implementation “Quad Pcm Codec” has publishesd in national Conference conducted by (emerging trends in Signal processing & VLSI design),NCRTCPT-2011’ National Conference on Recent Trends in Communication & Power Transmission in SRR Engg college ,Chennai.
  2. T. Vasudeva Reddy has presented a paper on“Modeling of Sobel edge detection method using vhdl has published in The national conference conducted by (emerging trends in Signal processing & VLSI design),NCRTCPT- 2011’NationalConference on Recent Trends in Communication & Power Transmission SRR Engg college, Chennai
  3. T. VasudevaReddy has presented a paper onon “Design & Implementation Quad Pcm Codec with filters ”has published in The international conference conducted by ICVLSIGNEC2010 (emerging trends in Signal processing & VLSI design) ,GurunanakEngg College, during 11th to 13th June 2010.
  4. T. VasudevaReddy has presented a paper on“VLSI & FPGA Implementation Of PcmCodec”has Presented in The international conference conducted by ICSAP, Bangalore Sept 2010.
  1. Dept placements coordinator(Since 2010)
  2. Internship & Industry Interactions In charge (Since 2010)
  3. Higher Education Inchrge (Since 2011)
  4. TI Team Member(Since 2012)
  5. Industrial Visits (Local & Non Local) (Since 2011)
  6. Vishnu Innovations lab incharge(2013)
  7. Organizing & Participating TI programs: 05 (Since 2012)
  8. Department Technical Committee member for promethean (Since 2008)

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