Marquee Tag

Ms. T. Keerthi

Assistant Professor, ECE Dept.
keerthi.t@bvrit.ac.in

B.Tech: – Electronics and Communication Engineering, Malla Reddy College of Engineering For Women-Suraram, Hyderabad 2014.
M.Tech: – VLSI System Design, BVRaju Institute of Technology, Narsapur 2016
Ph.D:– Pursuing Ph.D from KLEF University

Teaching Experience – 8 years 6 months

JNTU Registration No –: 1762-170521-122626
BVRIT ID –: 882
Ratification Status-: Ratified

  1. VLSI Design
  1. VLSI
  1. VLSI Automation member.
  2. CIC Member.
  3. Class Incharge.
  1. Completed AICTE Sponsored QIP PG Certification Programme on “Advanced materials for energy and sustainability” offered by IIT Bhubaneshwar

  2. Certified by NPTEL in the course on Digital Circuits.
  3. FPGA computing systems Background knowledge and introductory materials
  4. Introduction to the Internet of Things and Embedded Systems
  5. Programming for Everybody (Getting Started with Python)
  6. Developing FPGA-accelerated cloud applications with SDAccel: Practice
  7. Control of Mobile Robots
  8. AI for Everyone
  9. Developing FPGA-accelerated cloud applications with SDAccel: Theory
  10. Wireless Communications for Everybody
  11. Introduction to FPGA Design for Embedded Systems.
  12. VLSI CAD Part I: Logic
  13. FPGA Softcore Processors and IP Acquisition
  14. Fabrication Techniques for Mems-based Sensors: Clinical Perspective NPTEL
  15. Sensors And Actuators NPTEL
  16. Cloud Computing NPTEL
  17. Introduction To Internet Of Things NPTEL
  18. Computernetwork and internet protocol NPTEL
  19. Power Semiconductor Devices TCAD
  20. Cyber Security and Privacy NPTEL
  1. FDP on Module – VLSI Foundations as a part of VLSI Design Program, Conducted by HCL Tech 2025.
  2. FDP on “Artficial Intelligence (AI) in VLSI Chip DESIGN” from 06/12/2021 to 10/12/2021.
  3. One Week National Level FDP on “System Design Using Vivado Design Suite and Zynq-7000 SoC”

  4. One Week Online Faculty Development Program on”Advanced Antenna Design Using HFSS” from 12-05-2020 to 17-05-2020
  5. Five days FDP on Recent Trends and Future Applications in Electronics and Communication Technologies from 29-05-2020 to 02-06-2020
  6. One week FDP on Recent Trends in VLSI and Embedded Auto Industry from 20th to 24th of May, 2020
  7. One week FDP on Recent Trends in VLSI from 2 – 7 JUNE 2020
  8. One week FDP on Emerging trends in Electronics & Communication Engineering form 05th to 10th June 2020
  9. Five days FDP on “Augmented Reality (AR)/ Virtual Reality (VR)” from 16-06-2020 to 20-06-2020
  10. Three days FDP on “Digital IC Design with DFT Concepts using Mentor Graphics Tools” from 29/06/2020 to 01/07/2020
  11. Three days FDP on Excerpts of Research Methodology and Process from 20-07-2020 to 22-07-20201.  FDP on “Artficial Intelligence (AI) in VLSI Chip DESIGN” from 06/12/2021 to 10/12/2021.

     

  1. Roles of IOT on Industrial Applications on 21-05-2020
  2. Renewable Energy Sources using Matlab on 28-05-2020
  3. Art and Challenges of Writing papers for IEEE Transactions certificate on JUNE 8th 2020
  4. “How to get Research Grants from UGC, AICTE” (Minor or Major Research Projects Application Process) on 9th JUNE 2020
  5. Mixed Signal Design – Testing and Challenges on 27-06-2020
  6. “CYBER SECURITY” on 24th june, 2020
  7. “HOW TO IMPROVE TEACHING SKILLS” on 24th June 2020
  8. “BASICS of STATIC TIMING ANALYSIS“ held on 26/06/2020
  9. COVID-19: Solutions with AI/ML on 10-07-2020
  10. The art of making Project Proposals on 25-06-2020
  11. “Industrial Automation” on 19-08-2020
  1. One Week STTP on “Design, Verification and Development of AI-Driven Systems with Kria KV260 Vision FPGA & Innovations in MEMS Technology” 2025. 
  2. One Week Workshop on “Synergizing MEMS and Drone Technology: Pioneering VLSI Design” 2024

  3. One Week Workshop on “Digital VLSI System Design, Device Fabrication, and Image Processing with CADD Tools” 2024

  4. “AN EMERGING PARADIGM OF LOW POWER COMPUTATIONAL VLSI DESIGN” from 16th JUNE 2020 to 20th JUNE 2020
  1. YOGA FOR EVERY ONE (21-Days Online Course) 1st-21st June, 2020.
  2. I have undergone six months industrial oriented training on RTL Design using Verilog and Custom Layout from Jagruti Education and Welfare Society under DDU-GKY scheme provided by Central Government and State Government of Telangana in 2017.

  3. Attended Short Term Certificate course on “Digital System Design Using Verilog” in association with C-DACheld at BVRIT in March-2016.
  4. Skill Development Programme on “Real –Time Autonomous Navigation System Enabled with AI-based Inference Acceleration Using VLSI Architecture (TiHAN 2023)
  1. “AN Efficient Enhanced VLSI Architecture of Montgomery Modular Multiplication” Patent Application No. TEMP/E-1/31997/2021-CHE
  1. No. of international journal publications: 3
  1. “Simulation Driven Design of a Compact High-Voltage Contact-Separation TENG for Wearable Energy Harvesting 3rd International Conference on Emerging Applications of Material Science and Technology (ICEAMST 2025).

  2. Low Power FPGA-Based Real-Time Heart Rate Monitoring and Arrhythmia Detection Using Verilog in 2025 Global Conference on Information Technology and Communication Networks (GITCON)

  3. Real-time implementation of DCT-based image compression for robotics applications” Recent Trends in VLSI and Semiconductor Packaging 2025.

  4. Hardware-based design to estimate the movement of in indoor environments” Recent Trends in VLSI and Semiconductor Packaging 2025

  5. Automatic live location sharing for real-time vehicle tracking” Recent Trends in VLSI and Semiconductor Packaging 2025

  6. Design and Development of Elevator Assistance Based on Human Traffic” 2024 5th International Conference for Emerging Technology (INCET)

  7.  “Sensor Enabled Smart Wearable for Hazard Detection” 2024 International Conference on Expert Clouds and Applications (ICOECA)

  8. Design and Implementation of Fault Tolerant LZW for Reliable Data Compression Using Verilog HDL” 2024 IEEE 13th International Conference on Communication Systems and Network Technologies (CSNT)

  9.  “Design and Implementation of IR Sensor Based FPGA Robot Using Partial Reconfiguration 2023 3rd Asian Conference on Innovation in Technology (ASIANCON)”

  10. Real Time Implementation of Biometric-based EVM System for Distinct Verification” Procedia Computer Science 2023

  11.  “An efficient image analysis approach to evaluate the quality of cotton seeds” 2023 4th International Conference for Emerging Technology (INCET)

  12. An Automatic Vehicle Speed Controlling based on Traffic Signs Recognition using Convolutional Neural Network” 2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT)

  13. Sub-threshold novel driving techniques of low leakage and high SNM SRAM architecture for high computational design

  14.  “A Inventive Method for Door Detection on FPGA Using Sobel Edge Algorithm” 2022 2nd International Conference on Intelligent Technologies (CONIT)
  15. Efficient Detection and Classification of PEST Using Image Thresholding and Edge Detection Technique” 2022 2nd International Conference on Intelligent Technologies (CONIT) 

  16. A Versatile Design of Low Power and High-Speed Operational Amplifier using Nano Scale Transistors by Asharani. P, M. C Chinnaiah, T. Keerthi, T. Sirisha, Sanjay Dubey in International Journal of Innovative Technology and Exploring Engineering (IJITEE) ISSN: 2278-3075, Volume-9 Issue-5, March 2020.
  17. Neha sulthana, Chinnaaiah. M.C, Nandan.K, T.Keerthi , T.Sirisha “IOT based Advanced Black Box with Accident Detection and Location Tracing with Engine Auto Engine Turn off”, International Journal of Engineering & Technology, 7 (3.29) (2018) 728-73.(scoups)
  18. Jayshree Das, T Keerthi, I A Pasha,”Determination of PSL for FM and PM signals”, International Journal of Pure and Applied Mathematics Volume 118 No. 24 2018 ISSN: 1314-3395(scoups).